technical skills.

projects.

• 

  Real-Time Image Processing on FPGA

  • Developed an image processing system on FPGA using Verilog for real-time HDMI video processing.
  • Implemented brightness and edge detection algorithms, achieving nearly 90% code coverage.
  • Implemented system on Pynq Z2 board by designing a custom AXI IP.
  • Built a scalable UVM testbench from the ground up, featuring scoreboards, coverage models, and constrained-random sequences to ensure design quality.
  • Reached the final round of Digital Design Hackathon 2025 by Meity and CDAC.

  • Verilog
  • SystemVerilog
  • C++
  • Zynq SoC
• 

  Radio Frequency Up/Down Conversion Module : A Device for Frequency Translation in RF Systems

  • Designed and developed an SDR-based tool to enable frequency conversion from C/Ku bands to the L band, providing a versatile solution for communication across multiple RF bands. KiCad was utilized to create the PCB schematic. This approach replaced traditional analog circuits, offering improved flexibility and seamless integration with existing communication infrastructure.
  • Attended Grand Finale of Smart India Hackathon 2024 as one of the top 5 teams.

  • RTL-SDR
  • GNU Radio Companion
  • KiCad
  • Matlab
• 

  MCP3202 SPI Controller Design

  • Designed a complete SPI master controller for interfacing MCP3202 12-bit dual-channel ADC by Microchip.
  • Created robust finite state machine with 6-state architecture handling full SPI communication protocol.
  • Developed SystemVerilog testbench with behavioral MCP3202 model for comprehensive verification.

  • Verilog
  • SystemVerilog
  • FPGA
• 

  Comprehensive IoT Safety System for Hazardous Gas Detection

  • Designed and implemented an IoT-based system for real-time hazardous gas monitoring to enhance workplace safety.
  • Integrated gas sensors with cloud-based analytics for predictive safety and early warning alerts.
  • Developed a user-friendly dashboard with real-time data visualization, remote monitoring, and automated notifications.

  • ESP32
  • Arduino Coding
  • Firebase
  • IOT sensors
• 

  Design and Implementation of Various VCO for Phase Locked Loop

  • Designed and simulated 3-stage, 5-stage, and 7-stage CMOS ring oscillator-based Voltage-Controlled Oscillators (VCOs) using Cadence Virtuoso in 45nm technology.
  • Performed a comparative analysis of key performance metrics, evaluating the trade-offs between oscillation frequency, power dissipation, and stability across different architectures.
  • Quantified performance results, demonstrating that the 3-stage design achieved the highest frequency (3.66 GHz) with the lowest power (52.47 µW), while the 7-stage design offered the best stability with the fastest startup time (0.1 ns).

  • Cadence Virtuoso
  • Spectre Simulator
  • 45nm CMOS Technology